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(instructor discretionary)

Computer Architecture

Course Length:

40 hours over 10 weeks (2 two-hour meetings per week)

Course Description:

Overview of computer structure and behavior. Register machine instructions and addressing: data types and storage organization, instruction format and sequencing, addressing modes, instruction sets. Processing unit. Instruction cycle. Pipelining. Control unit: hard-wired control unit, microprogrammed control unit. Microprogramming. Bit-slice devices. Input-output organization: interfacing, interrupts, direct memory access. Buses. Computer arithmetic: ALU design, arithmetic and branching conditions, multiplier design, floating-point numbers and operations. Memory: memory hierarchies, memory system considerations, memory interleaving, cache memories, virtual memories. RISC. Prerequisites: COEN 20 (Introduction to Embedded Systems) and COEN 120A (Real Time Systems) or COEN 127C (Advanced Logic Design).

Course Learning Objective:

Understanding of register machine instructions and addressing: data types and storage organization, instruction format and sequencing, addressing modes, instruction sets. Processing unit. Instruction cycle. Pipelining. Control unit: hard-wired control unit, microprogrammed control unit. Microprogramming. Input-output organization: interfacing, interrupts, direct memory access. Buses. Computer arithmetic: ALU design, arithmetic and branching conditions, multiplier design, floating-point numbers and operations. Memory: memory hierarchies, memory system considerations, memory interleaving, cache memories, virtual memories. RISC.

Major Topics:

Architecture of an automated information system. Hardware components relating to input, output, CPU, and storage devices. Types of memory and access.

Method of Instruction:

Lecture, assignments, projects

Evaluation Methods:

Tests, assignments, projects


© 2006 Center for Advanced Study and Practice of
Information Assurance (CASPIA), Santa Clara University
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